1. Field of the Invention
The present invention relates to a differential driver circuit which can be used particularly as a line driver circuit for the data transmission by two-wire telephone lines on the basis of an XDSL method.
2. Description of the Prior Art
Driver circuits for XDSL applications are subjected to particularly high linearity and bandwidth demands in order to transmit a large volume of data at a low error rate over two-wire telephone lines. To this end, known circuit arrangements for operational amplifiers, as described in U. Tietze, Ch. Schenk, Halbleiterschaltungstechnik [semiconductor circuitry], Springer Verlag, Heidelberg, ISBN 3-540-42849-6, for example, are frequently produced using fast complementary bipolar technologies and BiCMOS technologies.
One particular challenge is to ensure that the respective power loss of driver circuits which drive differential data signals which are to be amplified into a two-wire telephone line is low. This is particularly difficult for XDSL signals which are to be transmitted, since their crest factor of typically 5.2 to 6.8 is relatively high.
The crest factor denotes the peak value of a waveform, divided by the RMS voltage of the waveform. The RMS voltage or the RMS value is that DC voltage which draws the same power in a load as the (irregular) AC voltage waveform. By way of example, a sinusoidal AC voltage signal has a crest factor of √{square root over (2)}≈1.4. Since XDSL signals have AC voltages of up to 30 MHz and a very irregular waveform, their crest factor is correspondingly high.
An appropriate driver circuit for xDSL signals therefore needs to be designed such that peak values which occur in the data signal to be amplified are also reliably amplified. This means that, in the case of line drivers with amplifier stages of type A for example, a respective bias current for the amplifier stages needs to be chosen to be of a magnitude such that peak values which occur, which may also occur just with a very low probability of approximately 10−7, can reliably be output in amplified form. A constant bias current provided at such a level therefore results in an undesirably high power loss in the driver circuit.
Proposals have been made in the past to reduce the power loss, such as in “A 744 mW Adaptive Supply Full-Rate ADSL CO Driver”, ISSCC 2002, J. W. Pierdomenico, S. Wurcer, B. Day. This document proposed increasing the required operating voltage for the amplifier stages or operational amplifiers used when necessary, that is to say when peak values of the signal to be transmitted occur.
An appropriate circuit arrangement based on the prior art is shown in FIG. 3. The circuit arrangement LD is used to amplify a differential input signal IN+, IN− to produce a differential output signal OUT+, OUT−. This is done by providing two driver amplifiers DA1, DA2, each having an inverting and a non-inverting input N, NI and an output A. The respective outputs A are connected to the respective non-inverting inputs N via feedback resistors R1, R3. In addition, a third feedback resistor R2 is connected between the non-inverting inputs N.
The non-inverting inputs NI are supplied with the respective signals IN+, IN− of the differential input signal IN+, IN−. In addition, the two driver amplifiers DA1 each have supply voltage connections V1, V2, to which supply voltage potentials VCCP, VEEP are applied. The supply voltage potentials VCCP, VEEP are delivered by a peak voltage supply SOP, which itself is coupled to standard supply voltages VCC, VEE. In this case, the standard supply voltage VCC, VEE is based on VCC=6V, VEE=−6 V, for example. In addition, the peak voltage supply SOP is supplied with the differential input signal IN+, IN−.
The peak voltage supply SOP monitors whether voltage spikes arise in the input signal IN+, IN−. If this is the case, the peak voltage supply produces supply voltage potentials VCCP, VEEP which are increased over the standard supply voltages VCC, VEE and which are supplied to the driver amplifiers DA1, DA2. This ensures that signal peak values are also reliably transmitted to the differential output signal OUT+, OUT−. To provide the increased supply voltage VCCP, VEEP, the peak voltage supply SOP contains charge pumps. A drawback of the circuit based on the prior art which is shown in FIG. 3 is, in particular, the increased circuit complexity as a result of the peak voltage supply SOP and disregarded linearity demands.
Another problem when amplifying xDSL signals is that the fastest signal transients occur at the time of a peak value. At each internal line node, for example at the inputs of operational amplifiers, parasitic capacitances arise, depending on production, which are usually non-linear. This means that signal distortions are produced for high internal voltage and signal swings on account of these non-linearities.